1. Field of the Invention
This invention relates generally to arrays on semiconductor chips. More particularly this invention relates to improvement in performance of arrays in semiconductor chips in three-dimensional configurations.
2. Description of the Related Art
Modern electronic systems typically use at least one type of semiconductor storage to hold data or program instructions used to produce useful results.
For example, Dynamic Random Access Memory (DRAM) is a dense and relatively fast storage apparatus. Typically, information is stored as presence or absence of electrical charge on capacitors in storage cells in a storage array in the DRAM. Addresses (and suitable control signals) are driven to the DRAM, and, for reads, data is read from selected storage cells in the DRAM. DRAMs are sometimes embedded in semiconductor chips further comprising processor cores, memory controllers, and the like. For example, a modern processor chip may comprise one or more processor cores, a level-1 cache, a level-2 cache, and a level-3 cache. One or more of the caches may be implemented as DRAMs.
Another commonly used storage apparatus is a Static Random Access Memory (SRAM). An SRAM constructed in the same technology generation of silicon products as a DRAM is typically considerably faster (that is, has faster read accesses and write times) but is significantly larger than a DRAM per bit of storage. A DRAM storage cell typically comprises a switch device (usually a Field Effect Transistor (FET)) and a capacitor device (usually a thin dielectric with an electrode on each side). An SRAM storage cell typically comprises six or eight FETs.
In either a DRAM storage or an SRAM storage, an address is decoded and a word line is activated. The word line is typically relatively long and electrically resistive. The storage cells, as well as parasitic capacitances on the word line itself, causes the word line to appear as a distributed “RC” interconnection, which is well characterized with a number of series resistors with capacitors to ground between each pair of resistors. A word line driver drives a signal at a proximal end of the word line and the signal propagates along the word line. A significant part of a read access time or a write time is devoted to propagating the signal from the proximal end of the word line to a distal end of the word line. Similarly, bit line drivers drive data to be written at a proximal end of a bit line. That data must propagate to a distal end of the bit line, also extending write times. During reads, storage cells in the storage array must drive a read data signal onto the bit line, and this read data signal must propagate at least a portion of the bit line to a sense amplifier.
Modern electronic systems increasingly demand fast read access times and fast write times in semiconductor storage.
Therefore, there is a need for a method and apparatus for reducing read access times and write times in a semiconductor storage.